Field effect transistors (FETs) are transistors in which the resistance of the current path from source to drain is modulated by applying a transverse electric field between grid or gate electrodes. The electric field varies the thickness of the depletion layer between the gates, thereby modifying the conductance. Organic field effect transistors (OFETs) utilize an organic semiconductor channel, such as polythiophene compounds, in place of conventional inorganic semiconducting materials. An OFET as generally practiced in the prior art is depicted in FIG. 1, where a gate electrode 20 is situated on a substrate 10, a gate dielectric layer 30 is disposed over the gate electrode 20, an organic semiconductor layer 40 used as an active layer of the transistor contacts the gate dielectric layer, and source and drain electrodes 50 and 60 also contact the organic semiconductor layer 40. The gate electrode 20 is typically formed in the organic transistor forming region by depositing a gate metal such as Cr/Au or Ti/Au and the thickness of the gate electrode 20 is typically about 1000 Ångstroms. On the gate electrode 20 in the transistor region, a dielectric layer 30 that insulates the gate electrode from other members is made of a non-conducting substance and is formed by a vacuum evaporation or a spin coating method with a nominal thickness of 3 micrometers or less and a conductivity less than 10 E-14 ohm/cm. The organic semiconductor layer 40 used as an active layer of the transistor is deposited by a spin coating or vacuum deposition method on the gate-insulating layer 30. Preferably, the thickness of the organic semiconductor layer 40 is less than 100 nm. The organic semiconductor layer 40 of the OFET can be made of a charge transfer complex or a thiophene polymer in order to enhance the mobility and the driving current of the field effect transistor. Some examples of charge transfer complexes are copper phthalocyanine, bis (tetra-n-butylammonium) palladium (II), and 7,7,8,8-tetracyano-p-quinodimethane. Then, a gold film with high electrical conductivity is patterned to form a source electrode 50 and a drain electrode 60.
These OFET fabrication methods are based on traditional silicon wafer deposition and other conventional vacuum deposition processes, which include sequential deposition of materials onto a single substrate. This processing occurs in a single, controlled manufacturing environment (e.g., clean room, vacuum chamber etc.). Depending on OFET design, three to five layers of materials are required to make a device. Sequential multiple layer deposition requires strict chemical and process compatibility for adjacent materials, long cycle time for layer-to-layer deposition, and post processing of each layer. These requirements significantly restrict materials selection and process adaptability of organic integrated circuit manufacturing. It would be a significant contribution to the art if a lower cost method of creating OFETs were developed that did not require such stringent process conditions.